1. Technical Field
The present invention relates generally to metrology sampling methodologies, and more specifically relates to a system and method for utilizing historical data to reduce metrology sampling rates.
2. Related Art
In complex manufacturing operations, such as the fabrication of semiconductors, metrology tools are implemented to control the manufacturing processes. In particular, metrology tools provide measurements, such as film thicknesses, critical dimensions, etc., which make certain that the manufacturing processes are performing adequately by ensuring that the product being manufactured is meeting its specifications. Metrology tools can therefore play a large role in a manufacturing operation. For example, in a typical semiconductor fabrication operation, a chip may be passed through various metrology tools hundreds of times. Accordingly, a significant portion of the manufacturing life-cycle and therefore cost can be attributed to metrology operations.
One method of reducing the number of metrology operations is to implement metrology sampling, where for example, a certain percentage of wafer lots are “skipped” and not measured. Unfortunately, existing sampling strategies are typically limited to lot skip methodologies which are based on industry recommendations and/or capability, and do not vary over time for each particular metrology operation. Very little effort is put into determining whether an initial sampling strategy is optimal or not. Moreover, present sampling strategies do not consider opportunities to further reduce redundant and/or unnecessary sampling to decrease cycle-time and optimize utilization for the metrology tool set that can potentially reduce tool capacity and manufacturing costs.
The most common form of sampling utilized within the semiconductor fabrication industry involves skip lot sampling, where as noted above, a certain percentage of the wafer lots are measured and a certain percentage are skipped. The skip rate is typically determined based on a Cp/Cpk analysis in which higher Cp/Cpk values allow for greater skip rates, e.g., based on industry customs. However, within each lot selected to be measured are a set of wafers that must be measured, and within each wafer to be measured are different sites that must be measured. Accordingly, there may be sampling optimization opportunities at these different levels that are not being fully explored.
Current techniques fail to effectively evaluate the efficacy of the sampling strategies being implemented. Accordingly, in any metrology process, there may be opportunities to reduce sampling. Thus, there exists a need for a system and method for better evaluating and implementing sampling strategies.